1. Field of the Invention
Generally, the invention relates to the monitoring of the time synchronization between a processing unit, such as a processor core, with exterior processing means, for example other microprocessors or other systems, during an exchange of data between this processing unit and these exterior processing means, by way in particular of memories of the "first-in first-out" type (FIFO memory).
The invention relates in particular to the exchanging of data at high bit rate between processing units.
2. Description of the Related Art
At present, the synchronizing of the exchanging of data between two hardware systems can be carried out with the aid of a master/slave procedure in which one of the two hardware systems, termed the "master", drives the second, termed the "slave". However, such a mechanism is slow since it requires interchanges of synchronization cues ("handshake"). Furthermore, when such a procedure uses a DMA-based technique, well known to the person skilled in the art ("direct memory access"), the DMA is in charge of the exchange. It is therefore the guarantor that the correct data will arrive at the correct moment. It relies on an addressed organization of the data to be accessed (each datum being associated with an address). However, such a solution only operates well in simple situations (transfer between a memory and a processing core for example) and an asymmetry is created since it is necessary for the exchange to take place between a master and a slave, thus rendering communication impossible without the intermediary of two DMAs.
Furthermore, the DMA requires time to possibly take into account the alterations in its environment (data unavailable, data originating from several sources, etc.) which crops the passband.
It is also possible to use supervised links in which there is still symmetry between the two systems exchanging the data, but the synchronization between these two systems is taken on board by a supervision unit. Such systems are also slower, adapt less easily to the local context of the two systems exchanging the data. Moreover, the supervisor may become complex in cases where several communication paths exist between several systems. Finally, the exchanges are less flexible.
It is further desired that the process and device which will allow massive exchanges of data (wide passband) whose significance does not depend on the precise instant at which they take place and on the time intervals between the data exchanged, but only on the order of the data in the sequence. It is further desired that the process and device allow an exchange of data at high speed between a processing unit and exterior processing means, this having a considerable advantage for real-time systems.